Optimising Compilers Past Paper

Control-flow

Unreachable code elimination

Reachability, control-flow property: will the control reach here?

Call graph

Data-flow analysis framework

Data-flow equations: relationship between values of that property immediately before in()in() and after out()out() each node nn in a flow graph.

Let Position posipos_i or posjpos_j be in(n)in(n) / out(n)out(n), the set of values setA(n)setA(n) / setB(n)setB(n) involved with the property immediately before / after the instruction. Depending on the property, one of the first or third equation with operator Op=Op=\bigcup_{} || \bigcap_{} is used in the data-flow equations.

  Nodes p
     |  pos = in(n)
  Node n : setA(n) <=> setB(n)  ...
     |  pos = out(n)
  Nodes s

posi(n)=  {}    Opppred(n)  posj(p)posj(n)=  (posi(n)setI(n))setJ(n), depends on the propertyposi(n)=  Opssucc(n)  posj(s)\begin{aligned} pos_i(n) = & \; \{ \} \; || \; \text{Op}_{p\in pred(n)} \; pos_j(p) \\ % & \Updownarrow \\ pos_j(n) = & \; (pos_i(n) \setminus setI(n)) \cup setJ(n) \text{, depends on the property} \\ % & \Updownarrow \\ pos_i(n) = & \; \text{Op}_{s\in succ(n)} \; pos_j(s) \\ \end{aligned}

Live variable analysis (LVA)

Liveness, data-flow property: will the value be used later?

  ...
   ↑  in(n)
 Node n : def(n) => ref(n)  ...
   ↑  out(n)
 Nodes s

inlive(n)=(outlive(n)def(n))ref(n)outlive(n)=ssucc(n)inlive(s)\begin{aligned} & in-live(n) = (out-live(n) \setminus def(n)) \cup ref(n) \\ & out-live(n) = \bigcup_{s\in succ(n)} in-live(s) \end{aligned}

Data-flow anomalies

Clash / interference graph

Available expression analysis (AVAIL)

Availability, data-flow property: will the value be assigned before?

 Nodes p
   ↓   in(n)
 Node n : gen(n) <= kill(n)  ...
   ↓   out(n)
  ...

inavail(n)=  {}    ppred(n)outavail(p)outavail(n)=(inavail(n)kill(n))gen(n)\begin{aligned} & in-avail(n) = \; \{ \} \; || \; \bigcap_{p\in pred(n)} out-avail(p) \\ & out-avail(n) = (in-avail(n) \setminus kill(n)) \cup gen(n) \end{aligned}

Redundancy elimination

Common sub-expression elimination

Copy propagation

Code motion optimisation

Register allocation

Static single assignment (SSA) and Strength reduction

Higher-level opt

Abstract interpretation

Strictness analysis

Constraint-based analysis (0CFA)

Inference-based analysis

Effect system

Alias and points-to analysis

Instruction scheduling

target code level for different architectures

Register allocation vs instruction scheduling

Decompilation

General opt

Phase ordering

General optimisations