DVFS Memory Model and Algorithm

SCP (single DVS core processor) and a single memory

Memory-DVS-System-2004-Embedded

Ref: R. Jejurikar, R. Gupta, Dynamic voltage scaling for system-wide energy minimization in real-time embedded systems, in: Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2004, pp. 78–81.

System Model

Goal

Consider task slowdown factors that minimize the total system energy consumption including the resource standby energy consumption.

Not DPM policies, but consider standby energy in computing static slowdown factors.

Energy consumption considering standby resources

Task τi\tau_i is executed at a speed η\eta

Ei(η)=CiηP(CPU,η)+RjRτiCiRjηP(Rj)E_i(\eta)= \frac{C_i}{\eta} P(CPU,\eta) + \sum_{R_j\in\R^{\tau_i}} \frac{C_i^{R_j}}{\eta} P(R_j)

Optimization problem

minimizeiEi(η)Timinimize \quad \sum_i \frac{E_i(\eta)}{T_i}

Subject to: [Feasibility]

iCiηiiTi\sum_i \frac{C_i}{\eta_i} \leq \sum_i {T_i}

The slowdown factor for a task that minimizes its total energy consumption, called the critical speed for the task.

Heuristic Algorithm

We compute the energy consumption of each task at all possible discrete slowdown factors.

A heuristic to select a task whose speed is increased. We increase the slowdown of a task that results in the minimum energy increase per unit time.

The current slowdown factor of a candidate task τi\tau_i is ηik\eta_i^k; the next higher factor is ηik+1\eta_i^{k+1}.

ΔEi=Ei(ηik+1)Ei(ηik)\Delta E_i = E_i(\eta_i^{k+1})- E_i(\eta_i^{k})

Speedup

Δti=Ci(1ηik1ηik+1)\Delta t_i = C_i (\frac {1}{\eta_i^k}-\frac{1}{\eta_i^{k+1}})

Find the candidate task with the minimum value of ΔEiΔti\frac{\Delta E_i}{\Delta t_i}

Procrastination-DVS-System-2004-Embedded

Memory-2004-Graph

---- Appendix -----

Maximizing the time period of sleep mode (which can be seen as a low power state, e.g., the power-down state and low refresh rate, when the memory is not accessed)

[19] J. Zhuo, C. Chakrabarti, System-level energy-efficient dynamic task scheduling, in: Proceedings of the Annual Design Automation Conference (DAC),2005, pp. 628–631.

[20] X. Zhong, C.-Z. Xu, System-wide energy minimization for real-time tasks: lower bound and approximation, ACM Trans. Embed. Comput. Syst. 7 (3) (2008) 28:1–28:24.

[21] X. Zhong, C.-Z. Xu, Frequency-aware energy optimization for real-time periodic and aperiodic tasks, in: Proceedings of the ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2007, pp. 21–30.

SMP and the shared main memory

Sleep and DVS-aware system-wide Energy Minimization (SDEM) problem

A cluster with multiple processor cores, which can share the heavy workload to speed up the task executions. In such architecture, the main memory is usually shared among multiple processor cores.

SMP-AM-2017-Energy-Idle Ref: Race to idle or not: balancing the memory sleep time with DVS for energy minimization

Model

2017-Memory-S4-1 2017-Memory-S4-2

When the number of tasks is more than the number of cores (NP-hard)

SMP-A-2021-Energy-SharedMemory Ref: Minimizing energy on homogeneous processors with shared memory

SCP-AM-2018-China_Wu-cache

W. Wu, M. Li, K. Wang, H. Huang, E. Chen, Speed scaling problems with memory/cache consideration, J. Sched. 21 (6) (2018) 633–646.