Scheduling Literature Review (Exclude DVFS)

Overview

Last session coves DVFS, This session includes

  1. different Task Models for CPU tasks (individual, parallel or with dependencies)
  2. Scheduling algorithm (List, Federated algorithm, etc)
  3. Energy Effiency in HMP (with inter/intra-Migration)
  4. Consider for related factors (Temp, Resource Contentions, fairness, etc)

Task Model

The primitives (parallel for-loops, omp task and fork/join or spawn/sync) in Parallel tasks (Cilk family, OpenMP and Intel’s Thread Building Blocks) results in intra-task parallelism structures well represented via graph-based task models.

Task Decomposition (Saifullah et al. 2014)

DAG Res

Scheduling Algorithm

If we denote

List Scheduling : Find a Priority Function

DAG Task Model

Hu-Algorithm P | pj = p, intree or outtree | Longest Completion Time (Cmax) ~ Critical-Path Whenever a machine is free for assignment, assign that ready job (i.e., the one all of whose immediate predecessors have already finished execution), which is at the highest level among all ready jobs. Ties can be broken in an arbitrary manner.

Critical Path

SMP-1990-DAG-MD | Cmax, the number of processors needed (n) ~ Modified Critical-Path See Section IV Scheduling

ASAP ALAP
Improvement : Aggressive core assignment strategy

SMP-DAG-Aggressive-RMS Maximize utilization of available processors. Assign task to fastest processor instead of the first one.

Scheduling Tasks in DAG to HMP

HMP-DAG-1997-Extended-RMS Extended Relative Mobility, adding normalization on speed.

Federated Scheduling

Semi-Federated : Jiang et al. (2017)

Energy Efficiency for DAG

MP-2018-DAG-Energy-ImplicitDeadline Each DAG -> m linked lists -> m cores (with merging)

Migration

Intra-DAG Migration

Inter-DAG Migration

MP-2019-DAG-Energy-ExplicitDeadline A Clustered Multi-core platform

Speed-profile for merged cluster

Resource Contention

[CAMPS] HMP-A-2018-Spain_Garcia-Contention-CAMPS

Ref: Contention-Aware Fair Scheduling for Asymmetric Single-ISA Multicore Systems

Temperature

MP-2007-Temperature_Aware_Scheduling.pdf

Appendix

HMP-Arch-2007-Intel_Li-OS-Sched

both SMP-and NUMA-style performance-asymmetric architectures.

[Min-Fair] HMP-AM-2018-Korea_Kim-Fairness

Ref:Exploring_the_Design_Space_of_Fair_Scheduling_Supports_for_Asymmetric_Multicore_Systems

Goals of fair scheduling